Integrated circuit technology continually advances resulting in decreases in device dimensions, increased circuit speed, and the like. Accordingly, diagnostic and editing techniques also need to continue to improve. Integrated circuit diagnostic and editing techniques have undergone dramatic changes, due in part to two factors. The stacking of increasingly large numbers of metal layers has limited the access to lower metal layers from the wafer front side. In addition, the widespread user of flipchip mounting, wherein the integrated circuit is mounted face down on a packaging substrate, leaving only the backside of the die exposed, precludes front side access to the chip. As a result, backside diagnostics and editing of integrated circuits has become increasingly important.
A challenge in backside diagnostics and editing is locating the exact position of one or more regions (e.g., drain, source, gate, trace and/or the like). To effectively and accurately navigate, the diagnostic or editing tool needs to be accurately positioned and registered to the as fabricated integrated circuit. This is accomplished using the as designed circuit (e.g., computer aided design (CAD) layout). Current methods are unable to accurately register the as fabricated integrated circuit and the as designed circuit to within a few tens of nanometers.